For both microcontrollers and FPGAs its quite challenging to calculate sine- and cosine-values with good enough precision to calculate different things with higher accuracy. Mitu Raj and Roshan Raju implemented a nice Mini-Cordic-IP-Core that does exactly this: calculate sin/cos as fixed-point values that can be used within an FPGA.
The following logic performs an inverse park transformation and converts dq-components into alpha-beta-components. It uses the cordic implementation of Mitu Raj that supports angles between -360° and 360°. The implementation can be found in another snippet on this website.
The following logic contains a standard PI-controller
This logic allows to inject a deadtime to an input-signal. The deadtime can be set in clocks, so the absolute deadtime is depending on the used clock:
Disturbances in measured signals for voltage or current are a bit annoying. This file contains a Second Order Generalized Integrator to filter a sine-wave at the input to a disturbance-free output. As replacement for the regular integrator it uses a special third order integrator implementation suggested by Theodorescu et. al. It reduces the ripple on…
FPGAs are quite fast and can switch up to 200 or even more MHz. But when it comes to PWM we have a problem: even at high clocks we cannot create a high resolution as with increasing bits of the digital signal (24 bit audio for instance) we would need a clock above 1 GHz…
The following code was written by Petr Nohavica in 2009 and receives a stereo-signal from an AES3 or AES/EBU receiver which is known as S/PDIF as well:
The following code takes some of the 24 bits of an audio-signal and outputs an 8-bit vector that can be used for a simple VU-meter or brightness control:
This is the logic for a nice stereo S/PDIF transmitter:
In 2024 I spent some time to find a good solution to convert digital audio to analog signals. I ended up using different types of sigma-delta-modulators with different orders and tested multiple configurations. The following implementations contain the most promising solutions for the Class-D-Amplifier we built up at the University of Kassel in 2024 for…
