S/PDIF Transmitter
This is the logic for a nice stereo S/PDIF transmitter:
This is the logic for a nice stereo S/PDIF transmitter:
To control one or more DMX512 universes from an FPGA, the following snippet outputs an USITT compatible DMX512 output-stream. The DMX512 timings can be adjusted using the generic-parameters. The standard timing-parameters are: Description Parameter Breaktime (t_min) 88 µs Mark after Break 8 µs Inter-Byte-Time 0 µs Mark before break time 0 µs Refresh-Rate 44 Hz…
This is an implementation of an 8-channel TDM-transmitter that accepts 24-bit audio, but transmits it within a 32-bit TDM-stream:
An FPGA is a very universal device – if you need a specific digital serial interface, you simply build it on your own. Here is a SPI-interface, that transmits 16 bits, 8 bit for the address, another 8 bit for the data. It is very useful to configure devices like a SPI-ADC, DAC or other…