An Engineers road movie to an FPGA based Class-D-Amplifier

This video shows the construction of our FPGA based full-digital Class-D amplifier and the participation at the finals of the IFEC2024 in Austin, Texas, USA.

In July 2024, I took part in the IEEE IFEC 2024 competition together with several students of the University of Kassel. Our device has three channels with each 135W at 48v input voltage. The top and bottom channels are separated by a digital Linkwitz-Riley-Crossover implemented in a Cyclone 10LP FPGA as an IIR filter.

If you're ever in the area around Kassel, why not drop by and visit us and our amplifier? Write me an eMail: christian.noeding@uni-kassel.de. More information about the University of Kassel and the Department of Power Electronics can be found under https://www.LE.uni-kassel.de.

Sourcecode and more: https://www.github.com/xn--nding-jua/Audioplayer

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